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Op-Amp Design
The op-amp is the workhorse of analog IC design. It has been studied extensively by IC designers from all over the world for over 30 years now. Today, new topologies and techniques are being investigated to deal with the ever-shrinking supply voltages of newer SoC's (Systems on Chip) fabri...

Circuit Sage Tools
Optimal Vdsat for Folded Cascode Opamps:
Mathcad worksheet calculates optimal vdsat of folded cascode current sources
Optimal Phase Margin of second order systems:
Mathcad worksheet calculates optimal phase margin for 2nd order systems

Online Tools
Op-amp design using Mathcad:
How to use Mathcad to optimize your two-stage op-amp
PSpice 9.1 and 10.0 at the University of Catania in Italy:
Do you miss it? I do. Libraries for bipolar and CMOS processes can be downloaded as well.

Online Articles
Detailed analysis of gain-boosted cascode amplifier paper from U. of Catania in Italy:
Very good. Analyzes this topology in detail in both time and frequency domains, verifies in 0.35-micron CMOS.
High-gain op-amp compensation techniques thesis from BYU:
Presents high-gain op-amp topologies and feedforward compensation technique as an alternative to the pole-splitting technique. Demonstrates in 0.25-micron CMOS (TSMC)
How to send Cadence output to MATLAB for post-processing:
If you have a small data set (a few hundred points) then use the "printvs" button in the Cadence calculator. For thousands of points you'd better use ocean (unless you are in the mood to wait a loooong time for your text file)
Good techniques for analog IC layout handout from Colorado State:
Techniques for good matching and reliability, including common-centroid arrangement and guard rings
Great research tool, tons of articles
Op-amp lectures from Professor Sansen:
Scroll down. Various presentations on op-amp topologies and design techniques.
Design of High Speed Op-amps presentation from Boise State:
Biasing and compensation techniques for high-speed op-amps in 50-nm CMOS
Improvements in biasing and compensation of CMOS op-amps: paper from U. of Toronto:
Adds a high impedance node to constant-gm bias circuit for more efficient (less area) op-amp compensation, presents compensation technique for more consistent phase margin over temparature and process variations
OTA's for gm-C filters presentation from TAMU:
Very good tutorial on how to design OTA's for gm-C filters between 0.1-Hz and 2.0GHz
Advanced Analog IC Design lecture notes from Texas A&M:
Rail-to-rail amplifiers, OTA's, switched-cap, CMFB, low-voltage techniques, and other topics
Overshoot as a function of Phase Margin article from U. of Rhose Island:
Percentage overshoot versus Phase Margin of a closed-loop circuit using a two-pole op-amp
High performance current mirrors lecture handout from Georgia Tech:
Wide-swing and regulated cascode current mirrors for higher performance
MOS op-amp lecture handout from Georgia Tech:
Folded-load MOS op-amps, linearisation and higher slew rate techniques
Cascode op-amps lecture handout from Georgia Tech:
Cascode and folded cascode MOS op-amps
Feedback lectures from Professor Phillip Allen at Georgia Tech:
Lectures 250 through 290. Feedback topologies in op-amp circuits.
Comparators lecture handouts from Georgia Tech:
Lectures 360-410. Analysis of MOS comparators
Advanced op-amps lecture handouts from Georgia Tech:
Lectures 310-350. Low-power, low-voltage, high-speed opamp topologies
Two-stage MOS op-amp design lecture notes from Georgia Tech:
Design procedure for two-stage CMOS op-amp
Op-amp CMRR measurement setup paper from UT-Dallas:
Analyzes measurement setups for op-amp CMRR, proposes new setup
Op-amp with high-current, class-AB output stage: paper from UT-Dallas:
Class AB output stage has 100 mA output current drive capability with 1.5 mA quiescent current.
Op-amps for cell phone speakers presentation from UT-Dallas:
Requirements of cell phone speaker drivers and evaluation of circuit topologies for the task
Sizing CMOS op-amp transistors presentation from UT-Dallas:
Design of 2-stage and folded-cascode CMOS op-amps
Design of low-offset CMOS op-amps presentation from UT-Dallas:
Analysis of issues that affect the offset voltage in a CMOS op-amp
CMOS op-amp lecture notes from Phillip Allen:
Very good lectures, basic and advanced topologies, detailed analysis.
1968 app note from Widlar shows cool op-amp topologies:
Oscillators, comparators, level shifters, multipliers, root extractors (!) and other functions that can be performed using op-amps.
Feedback Amplifiers and Oscillators presentation from U. of New Brunswick:
Nice, shows various feedback topologies and identifies feedback topologies of practical circuit configurations
MOS Op-amp tutorial from Gray and Meyer:
Two-stage CMOS op-amp tutorial plus more elaborate topologies and output stages
Geometric programming of CMOS op-amps Stanford paper:
Automatic optimization of CMOS op-amps given a set of performance targets
Analysis of non-linearities in CMFB circuit paper from UC - Davis :
Analyzes the effects of non-linearities in CMFB circuits, proposes use of degeneration resistors to reduce them
Paper from UC - Davis analyses techniques to cancel the RHP zero in 2-stage fully differential CMOS op-amps:
Analyzes and compares 4 current buffer compensation schemes for fully differential CMOS op-amps.
Paper from UC - Davis analyzes how to determine stability in fully differential circuits using method of return ratios:
Presents SPICE techniques to obtain the return ratios of differential and CM feedback loops as well as techniques to determine stability.
Cascode OTA for microwave applications paper from Queen's University in Ontario:
Presents 11-mA/V gm-cell that has 10-GHz bandwidth, uses it to implement a 2.9-GHz inductor-less oscillator by creating an active inductor with the gm cell. Implemented in 0.18-micron CMOS.

Transimpedance amplifiers and flip-flops for 40 GB/s links:
TIA's implemented in 90-nm and 65-nm CMOS optimized for low power
CMOS Optical Pre-Amplifier for Wireless Infrared Communications: paper from U. of Toronto:
A fully-differential, variable-gain transimpedance amplifier in 0.35-um CMOS
TIA for voltage-scalable short-distance optical link paper from Harvard:
TIA implemented in 0.13-micron that works from 0.7V (lower bit rate) to 1.2V (higher bit rate) in order to minimize power dissipation
40 Gb/s TIA in 0.18-um CMOS paper from NTHU in Taiwan:
Presents pi-type inductive peaking (PIP) inter-stage matching topology to resonate with NMOS intrinsic capacitances in a 4-stage TIA. Demonstrated in 0.18-um CMOS, circuit draws 33 mA from 1.8-V and has 30-GHz BW.

2-GHz PGA paper from U. of Stuttgart in Germany:
51-dB of dynamic range with 3-dB gain control steps. Implemented in 0.12-micron CMOS.
Low power CMOS VGA for disk drive read channels paper from U. of Minnesota:
Often-cited paper presents an exponential gain versus control voltage transfer function using CMOS
Switched-capacitor VGA:
0-24 dB gain range, implemented in 0.25-um CMOS
83-dB gain range VGA paper from ICU in Korea:
Controls gain by changing the body voltage of a PMOS device. Demonstrates in 0.18-micron CMOS.
Reconfigurable digitally controlled VGA paper from ICU Korea:
Achieves 42 dB of dB-linear range in a single stage by reconfiguring VGA using switches. Demonstrates in 0.18 micron CMOS.
CMOS RF VGA for mobile DTV tuners: paper from TAMU:
Works at 400-900 MHz, 1-dB gain steps, 33-dB range, 16-dB max gain, fabricated in 0.18-um CMOS
2.2-GHz BW, inductor-less VGA paper from UC-Berkeley:
VGA with 2.2-GHz 3-dB BW implemented in 90-nm CMOS uses no inductors and employs a dual feedback path for DC-offset correction. Has 60-dB of gain tuning range.