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How can I choose a good buffer for the I/Q signal output in PLL?

Posted by louwf on August 7, 2009, 11:45 am

For the I/Q signal, we want have a good phase accuracy.But usually I/Q signal's phase accuracy will be deteriorated due to mismatch or process variation of I/Q buffers.
So buffers' design for I/Q signal will be important. Which buffer will be suitable in the I/Q output. Thank you ~~

Replies to This Discussion

Reply by Jesal Mehta on August 7, 2009, 8:14 pm: Delete; What is the input and desired output signal level. Any amplification required? What is the frequency of opeeration?; ▶ Reply to This

Reply by louwf on August 26, 2009, 9:19 pm: Delete; The operation frequency is 5-6GHz.The input signal level is high,So i don't want to use this buffer to amplify the signal. I just want to get the good phase accuracy and little amplitude error...How I can design this buffer better~~~~~~~~.....Thankyou Jesal Mehta; ▶ Reply to This

Reply by louwf on August 27, 2009, 10:41 am: Delete; The operation frequency is 5-6GHz.The input signal level is high,So i don't want to use this buffer to amplify the signal. I just want to get the good phase accuracy and little amplitude error...How I can design this buffer better~~~~~~~~.....Thankyou Jesal Mehta; ▶ Reply to This

Reply by Jesal Mehta on August 27, 2009, 10:46 am: Delete; Source follower can be an easy way to go here. Most of mismatch will come due to presence of layout/routing mismatch; ▶ Reply to This