You can find a good starting point herehttp://www.iberchip.org/iberchip2006/ponencias/126.pdfYou can also check out Circuit Sage Weak inversion tools that facilitate gm/Id design

Thanks a lot for the information! I'll start studying it... Anything new I come back here

You can try to send en amail to Pr D. Flandre. In 1999, he did a Post-doctoral thesis.Title : "The gm/ID synthesis methodology: the missing link between symbolic analysis and design automation for MOS integrated analog circuits".Source: http://www.dice.ucl.ac.be/~flandre/Hope it will help you :-)

Hi,There's a group in EPFL, Switzerland which has done extensive work on gm/Id methodology. They even have a free tool for this. Check it out:http://analog.epfl.ch/PAD/PAD_pages/DesignToolHome.htmlI haven't used it but have seen the demo and seems useful in some cases to save time in iterating design