Hi, can you provide more details about your circuit? What amplifier topology are you using? I usually try to aim for 70-80 degrees in the nominal case so that over PVT I get > 60 degrees.

I often use phase margins down to 55deg under process corner simulations. In some applications settling time to fine accuracies suffers when you go lower. In other applications, noise gets amplified at the loop bandwidth with lower phase noise. Also nominal phase margin must be large enough to guarantee stability in process corners. It is possible you have an application, where settling time and noise peaking around the loop bandwidth is not as important and a lower phase margin is acceptable. If you are building a filter, you probably want to check how the frequency response of the closed loop filter is affected by reduced phase margin.

Low PM produces ripple in transients. As the PM drops the system sensitivity increases until at 0 degrees you have an oscillator. The first problem is in getting the phase margin properly. You cannot always simply open the loop as you change loading conditions and may remove a feed-forward signal.