SoC design verification has become an incredibly difficult task particularly with the increasing complexity of analog and mixed signal building blocks. Unlike its digital counterpart, analog and mixed signal design in general has not followed any formal approach for verification. It heavily relies on the experience of senior designers to debug and ensure functionality. With increased system complexity and often overwhelming verification requirements, the time-to-market demands impose tremendous pressure on today’s design engineers.
In dealing with such challenges, Designer's Guide Consulting has developed a practical methodology for analog and mixed signal design verification, which greatly speeds up verification and improves design quality for design teams either large or small. It has been applied on many production projects and demonstrated great success.
Specializing in transitioning the verification methodology to benefit more design companies, Designer’s Guide Consulting provides training classes for engineers. We had a very successful analog verification class last September. In order to accommodate more people’s inquiries and interests, we will offer another 4 day training class 27 January to 30 January, 2009.
This challenging four day course provides participants with the tools they need to take on the task of verifying complex analog, RF, and mixed-signal integrated circuits. It combines lecture with a substantial amount of time in the lab to teach the overall analog verification process. You will learn how to develop a verification plan, functional models of analog blocks, regression tests for those models, and a fully verified Verilog model for the entire analog portion of the design for use in chip-level verification.
If you want to know more information, please visit http://www.designers-guide.com/classes.html
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